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Design of Test Device for Double-Rate Counter

Along with rapid development of microelectronic technology and single-chip microcomputer technology,
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Design of Test Device for Double-Rate Counter

Design of Test Device for Double-Rate Counter

Abstract

Along with rapid development of microelectronic technology and single-chip microcomputer technology, the market appears more and more electronic rate counter, the counting accuracy testing device also subsequently grow in quantity. Aiming at the double-rate counter, it designed a testing device used for double-rate counter accuracy test. 

The testing device used low-power microprocessor ATmega8 SCM(single-chip microcomputer) as the control core, collocated with a pulse output circuit, the LED digital tube display circuit and alarm circuit to implement count accuracy test together. After tested, the test device works well, and has the advantages of simple structure, convenient to use.

1. Introduction

Counting accuracy is the most important performance index for rate counter, and it concerns if the counter can get the final application. Therefore, before marketed the product needs to undergo strict counting accuracy test. 

The paper proposed and designed a kind of test device combined with the SCM and electronic technology, aiming at the double-rate counter, used to test their counting accuracy. The test device for double-rate counter used ATmega8 SCM as the core, inputs the pulse to the input end of double-rate counter through the pulse output circuit, then contrast number of pulses to complete the test work, it has simple operation, low cost, and certain application value.

2 Overall Design of the System

2.1 Analyses of System Requirements

Double-rate counter is a kind of cumulative counting device for metering occasions. The device has two input ends, one is rate selection end, and another is rate input end. Its work is as follows: when the input signal in the rate selection end is low level (0.3V), the number of pulses inputted from rate input end is included into rate A, and when the rate selection end is high level(above 3.6V, not to exceed the maximum12V), the inputted pulses is included into rate B. 

The rate A count plus rate B is equal to the total number of pulses. When the level of rate selection end is in the range of 0.3V~3.6V, the results is included into A or B randomly, so the counting to pulse should be avoided in the process of testing.

2.2 Overall Block Diagram of the System

Double-rate counter test device is composed of a control module (ATmega8 SCM), parameter setting and manual operation module (keyboard operation), display module (LED digital tube) and power supply module.  The control module is the core of double-rate counter test device, using ATmega8 microcontroller to complete the function of each module. 

Keyboard part adopts a single-key keyboard equipped with a starting key, the stop key and the setting key, which are used for operating personnel to control the test device. LED digital tube display module which employs LED dynamic display mode to display the setting number of pulses. 

Power supply module is used to provide the test device with a stable DC power; a single-phase alternating current is converted into the stable DC voltage through the power transformer, rectifier circuit, filter circuit and a voltage stabilizing circuit. The system overall structure diagram is shown in Fig.1.

Fig. 1. The overall structure diagram of the system

References:
1. Lv, X., Jiang, X., Duan, H.: Design of Multi-route Arbitrary Waveform Signal Generator Based on ATmega8. Applied Science and Technology 32(8), 23–25 (2005)
2. Ma, C., Zhan, W., Geng, D.: Atmega8 Principle & Application Handbook. Tsinghua University Press, Beijing (2003)
3. Li, S.: SCM LED display Interface Technology. Journal of Yangtze Staff University 20(4), 47–49 (2003)
4. Xie, Z.: Design, Experiment and Test of Electronic Circuit, 3rd edn. Huazhong University of Science and Technology Press, Wuhan (2006)
5. Shen, W., Zhan, W.: Introduction to C Language Development

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